The present invention pertains to serial to parallel (S/P) converters for converting digital information from serial to parallel form, and particularly to S/P converters wherein information contained in incoming serial form control bits asynchronously instructs the converter to convert other information contained in incoming serial form data bits to parallel form.
Devices for converting digital information from serial to parallel form are generally well-known. However, there exists a need in some computer systems for the conversion of digital information which comprises a succession of discrete sets of data bits and control bits, wherein the data bit sets are coupled into the converter at irregular intervals, and a control bit set immediately preceding each data bit set contains an indication that the next following set in the succession of digital information will be a data bit set.
An S/P converter capable of converting this type of information could find application in the High Speed Data Switching System (HSDS) developed to rapidly interconnect computer equipments of the Navy Tactical Data System (NTDS). Each HSDS channel carries information in serial form whereas each NTDS equipment may accept information only in parallel form so that the output of an HSDS channel must becoupled to an NTDS equipment through an S/P converter. In addition, the output of an HSDS channel may comprise a succession of formats, data formats, each of which includes a set of changeable data bits, or data word, to be converted to parallel form, and control formats, each of which includes a set of changeable control bits. At least two control formats are interspersed between every two data formats, and the control bit set of each control format is provided with an indication of whether the next format coming out of the HSDS channel will be another control format or a data format. An S/P converter for coupling the output of an HSDS channel to an NTDS equipment must therefore be responsive to the indicator of each control format so that the converter will be enabled to convert a control bit set during a control format, and a data bit set during a data format. Also, the converter must be capable of a very rapid rate of operation since the output of changeable data bits from the HSDS channel may be at a rate of 10 megabits per second, and the input to the NTDS equipment of converted data words may be at a rate of 125 kilowords per second.